This invention relates to a transmission-reception circuit including a transmitter circuit and a receiver circuit connected to each end of a transmission line, or to a transmitter-receiver circuit connected to a bus-structure type common transmission line.
As the transmission-reception circuit for transferring digital signals between two devices connected to opposite ends of a transmission line, those disclosed in JP-A-56-98052, JP-A-3-186033, JP-A-2-50537, JP-A-51-64811, and U.S. Pat. No. 4,899,332 are heretofore well known.
The transmission-reception circuit disclosed in JP-A-56-98052 (title of the invention: Baseband Two-Way Simultaneous Transmission Circuit) is capable of fully duplex communication on a transmission line, which was made possible by connecting outputs of the transmitter circuits in the communication devices to the opposite communication devices through resistances and a transmission line, inputting as reference inputs of comparators the voltages obtained by combining the outputs of the transmitter circuits, divided by voltage-divider resistances, with the reference voltages, inputting the received signal from the other device as a comparative input to the comparator, and detecting changes in level of the signal received from the other device with the comparator regardless of the signal from the device at this end.
The transmission-reception circuit disclosed in JP-A-3-186033 (title of invention: Signal Transmission System) is capable of fully duplex communication on a transmission line, made possible by, after combining signals from a set of opposing transmitters by a signal synthesizer, separating the transmitting signal by this device and the transmitting signal by the other device from the composite signal, and extracting the transmitting signal sent by the other device by removing only this device's own transmitting signal from the signals separated as described.
The transmission-reception circuit disclosed in JP-A-2-50537 (title of invention: Two-Way Simultaneous Communication System) is capable of fully duplex communication on a transmission line, made possible by having the devices at opposite ends of a communication line provided with a driver circuit and a receiver circuit formed based on the same reference, generating threshold values and desired output voltages corresponding to high-level or low-level input signals by setting supply voltages and resistances, and discriminating the signal level of the other device by comparing the output voltages with the corresponding threshold values with the comparators of the receiver circuits at the opposite ends.
The transmission-reception circuit disclosed in JP-A-51-64811 (title of invention: A Fully Duplex Digital Transmission Method And Device Using A Single Signal Line) is capable of fully duplex communication on a transmission line by generating a composite signal by comparing a transmitting signal and a receiving signal, and regenerating a receiving signal from the composite signal.
FIG. 13 is a block diagram of a transmission system formed by using the invention of JP-A-51-64811, and shows a plurality of transmitter-receiver circuits TR1, TR2, and TRn connected to a transmission line L, both ends of the line L being connected to earth through terminal resistances RT. The transmitter-receiver circuits TR are formed respectively by drivers D1, D2, Dn and receivers R1, R2, Rn, and send transmitting signals SD1, SD2, SDn and receive receiving signals RD1, RD2, RDn. In FIG. 13, Z0 indicates a line impedance.
The transmission-reception circuit of U.S. Pat. No. 4,899,332 is capable of fully duplex communication on a transmission line, made possible by providing an adder circuit for adding signals sent from two transmitters, comparing output of the adder circuit with a threshold voltage which shifts according to the transmission level of the transmitter on this side, and extracting only the signal sent from the transmitter on the other side.
FIG. 14 is a circuit diagram showing the configuration of the transmission-reception circuit of U.S. Pat. No. 4,899,332, and a set of transmitter-receiver circuits connected to one end of a transmission line L with line impedance Z0 includes a pair of a transmitter circuit DA and a receiver circuit RA, and another set at the other end includes a pair of a transmitter circuit DB and a receiver circuit RB.
Output of the transmitter circuit DA for sending a transmitting signal SDA is connected through a terminal resistance RTA to the transmission line L, and is also connected through voltage-divider resistances ra1 and ra2 to a threshold voltage. A voltage obtained with voltage-divider resistances ra1 and ra2 connected between the output voltage of the transmitter circuit DA and the threshold voltage VTHA is input as a reference voltage to the receiver circuit RA formed by a differential amplifier. A signal at a junction point between the terminal resistance RTA and the transmission line L is input through a resistance ra3 to the other input terminal of the receiver circuit RA.
The transmitter-receiver circuit on the other end of the transmission line L is formed in the same way as described above. In FIG. 14, the components on the other end are shown with subscript codes B or b.
The values of the resistances are set such that RTA=RTB, ra1=ra2, ra3=ra1//ra2, rb1=rb2, and rb3=rb1//rb2.
Therefore, when the transmitter circuit is not sending a signal, the reference voltage input terminal (-) of the receiver circuit RA is at 1/2 of the threshold voltage VTHA. However, when the transmitter circuit DA sends a transmitting signal, the voltage level of the input terminal (-) shifts to the HIGH level side by the amount corresponding to the amplitude of the transmitting signal. Consequently, even when the transmitter circuit DA in the same circuit sends a signal, the voltage level of the input terminal (+) of the receiver circuit RA does not exceed the voltage level of the reference voltage input terminal (-), so that the receiving signal RDA stays at the LOW level.
However, while the transmitter circuit DA is sending a transmitting signal, if the transmitter circuit DB at the other end sends a transmitting signal, the voltage level of the input terminal (+) of the receiver circuit RA exceeds the voltage level of the reference voltage input terminal (-), and therefore the receiving signal RDA goes to the HIGH level. On the other hand, while the transmitter circuit DA is not sending a transmitting signal, if the transmitter circuit DB on the other end is sending a transmitting signal, in this case, too, the voltage level of the input terminal (+) of the receiver circuit RA exceeds the voltage level of the reference voltage input terminal (-). and therefore the receiving signal RDA switches to the HIGH level.
The arrangements described above makes a fully duplex communication possible.